Formal Verification Intern

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, amazing people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product.

Do you love working on challenges that no one has solved yet? As a member of our dynamic group, you will have the unique and rewarding opportunity to craft upcoming products that will delight and inspire millions of Apple’s customers every single day.

In this highly visible role, you will be at the centre of a System-on-a-chip (SoC) design verification effort collaborating with design, with a critical impact on getting high quality and bug-free functional products to millions of customers quickly.

While working on complete formal verification for single or multiple design blocks and IPs, you will collaborate with members of the team to: - Create formal micro-architecture specifications - Develop formal verification test plans - Proving properties for the design, finding design bugs, and working closely with design teams to help improve the micro-architecture - Architecting novel and innovative solutions for verifying sophisticated design micro-architectures - Developing and implementing re-usable and optimised formal models and verification code base

Minimum Qualifications

• Knowledge of digital design logic design and/or formal verification techniques
• Understanding of CPU design, pipeline architectures, memory, DMA controllers, out-of-order and speculative instruction execution hardware, bus interconnects, and cache coherence mechanisms a plus
• Able to interpret hardware specifications (using temporal logic assertion-based languages such as SVA or PSL) is a plus
• Knowledge of EDA formal tools and experiences in CAD tool development is a plus
• Proficiency in any scripting language such as: TCL/PERL/etc. with excellent debugging skills
• Strong problem solving and interpersonal skills
• Strong written and verbal communication in English

Preferred Qualifications

• Currently enrolled in a Bachelor's, Master's or PhD Degree program in Electronic Engineering, Computer Science, Computer Engineering, Mathematics / Applied Mathematics or a related field.
• This position is a full-time internship and availability for 6 months as a minimum is preferred.