Shanghai, China Role overview
About this role
Company:
Qualcomm China
Job Area:
Interns Group, Interns Group > Interim Engineering Intern - SWGeneral Summary:
1. Handle synthesis/DFT logic insertion and ATPG pattern generation.2. Handle physical design tasks from verilog netlist to GDS.3. Handle Chip/Block floorplan, PD implementation, include placement, CTS,PCTS,routing,timing analysis,SI analysis and IR-drop analysis.4. Timing fix and signoff with timing check tool Primetime.5. Finish DRC/ERC/PERC/LVS checks.
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